1. Field of the Invention
Embodiments of the invention generally relate to an electroless deposition system for semiconductor processing.
2. Description of the Related Art
Metallization of sub 100 nanometer sized features is a foundational technology for present and future generations of integrated circuit manufacturing processes. More particularly, in devices such as ultra large scale integration-type devices, i.e., devices having integrated circuits with several million logic gates, the multilevel interconnects that lie at the heart of these devices are generally formed by filling high aspect ratio, i.e., greater than about 25:1, interconnect features with a conductive material, such as copper. At these dimensions, conventional deposition techniques, such as chemical vapor deposition and physical vapor deposition, are not able to reliably fill interconnect features. As a result, plating techniques, i.e., electrochemical plating and electroless plating, have emerged as promising processes for void free filling of sub 100 nanometer sized high aspect ratio interconnect features in integrated circuit manufacturing processes. Additionally, electrochemical and electroless plating processes have also emerged as promising processes for depositing post deposition layers, such as capping layers.
However, with regard to electroless plating processes, conventional electroless processing systems and methods have faced several challenges, such as accurately controlling the deposition process and the defect ratios in the resulting deposition layers. More particularly, conventional systems have suffered from poor substrate temperature control, as the resistive heaters and heat lamps used on conventional electroless cells have not had the ability to provide a uniform temperature across the surface of the substrate, which is critical to the uniformity of electroless deposition processes. Additionally, conventional electroless systems have not implemented control over the environment inside the electroless deposition chamber, which has recently been shown to have a substantial impact on defect ratios. Further, a functional and efficient integrated platform for electroless deposition processes capable of depositing uniform layers with minimal defects has not been developed. As such, there is a need for an integrated electroless deposition apparatus capable of depositing uniform layers having minimal defects.